Junction Field Effect Transistor

The Junction Field Effect Transistor

As we already study bipolar junction transistor is manufactured using two PN-junctions and it acts as the main current carrying path between the Emitter and the Collector terminals. The Junction Field Effect Transistor has no PN-junctions but instead has a narrow piece of high resistivity semiconductor material which form a “Channel” of either N-type or P-type silicon for the majority carriers to flow through with two ohmic electrical connections which are at either end commonly called the Drain and the Source respectively.

Configuration of JFET

There are two basic configurations of junction field effect transistor

• N-channel JFET (In the N-channel JFET’s channel is doped with donor impurities so the flow of current through the channel is negative so it is term as N-channel in the form of electrons).
• P-channel JFET (In the P-channel JFET’s channel is doped with acceptor impurities so the flow of current through the channel is positive so it is term as P-channel in the form of holes).

The symbols and basic construction for both configurations of JFETs are shown in the figure below.

The semiconductor “channel” of the Junction Field Effect Transistor is a resistive path in which a voltage V_DS causes a current I_D to flow. As the channel is resistive in nature, so a voltage gradient is thus formed down the length of the channel so the voltage becoming less positive as we move from the Drain terminal towards the Source terminal. as a result, the PN-junction become high reverse bias at the Drain terminal and create a lower reverse bias at the Source terminal. This biasing in channel causes a “depletion layer” to be formed within the channel and an effect of this the width increases with the bias.

The magnitude of the current flowing through the channel between the Drain and the Source terminals is controlled and affected by a voltage applied to the Gate terminal, which is a reverse-biased. In the case of N-channel JFET this Gate voltage is negative and in case of P-channel JFET the Gate voltage is positive.